There are many different functional units in a central processing unit (CPU) that operate in certain stages of an instruction pipeline. Depending on the class of instruction or the content within an instruction, it is often the case that not all of these functional units are utilized at the same time. Thus, there is no inherent reason all functional units within a CPU should be simultaneously on. Rather, some units at any given time may have no data to operate upon. When a functional unit has no data to operate, it is effectively idle. However, such idle units that are still fed an active clock will experience power consumption through the constant switching (i.e. toggling) of the latches throughout the unit due to the received clock signal.
x86 Instructions comprise several fields. Three of the most basic fields are the instruction opcode field (e.g., move, shift, etc.), an immediate operand field, and a displacement bytes field. Although many functional units within the instruction pipeline have circuitry to deal with these fields, some instructions that move through the pipeline do not contain any displacement byte information or an immediate operand information. In these cases, the data filling up these fields are not utilized and generally consist of random data bits. As the instruction travels through the pipeline, although these fields are not utilized, the functional units still see switching at their latches that enter this information. This switching further increases power consumption within the functional units of a CPU.